Cache Write Policy: A Complete Guide to Write Through and Write Back
Modern processors use cache memory to reduce the time required to access frequently used data. Reading data from the cache is relatively straightforward because the CPU simply checks whether the required data is already present. However, writing data is more challenging because both the cache and main memory (RAM) may contain copies of the same data.
When the CPU modifies a value stored in the cache, an important question arises:
How should the updated data be synchronized between Cache and Main Memory?
This is where Cache Write Policies come into play. They define how and when modified data is written back to the main memory.
In this article, we'll explore the two most common cache write policies:
- Write Through
- Write Back (Write Behind)
We'll understand how each policy works, compare their advantages and disadvantages, study timing diagrams, and learn when each policy is used in real-world systems.
What is a Cache Write Policy?
A Cache Write Policy defines how the cache and main memory are updated when the CPU writes new data to a memory location.
Since the same memory block may exist in both cache and RAM, the system must decide:
- Should both cache and RAM be updated immediately?
- Or should RAM be updated later?
The answer depends on the selected write policy.
Definition:
A Cache Write Policy is the mechanism that determines when modified cache data is written to the main memory.
Why Do We Need Write Policies?
Types of Cache Write Policies
There are two widely used cache write policies:
- Write Through
- Write Back (Write Behind)
1. Write Through
What is Write Through?
In Write Through, every write operation updates:
- Cache
- Main Memory
at the same time.
This means both copies are always identical.
Basic Idea
Whenever the CPU writes data:
CPU │ ▼ Cache │ ▼ Main Memory
Both memories are updated immediately.
Working Principle
When the CPU writes data:
Step 1
CPU sends the write request.
Step 2
Cache is updated.
Step 3
The same data is immediately written to Main Memory.
Step 4
Write operation completes.
Advantages of Write Through
- Very simple implementation.
- Cache and memory are always consistent.
- No dirty bits required.
- Safer during unexpected power failures.
- Suitable for shared memory and I/O systems.
Disadvantages of Write Through
- Every write accesses main memory.
- Generates high memory traffic.
- Higher write latency.
- Increased power consumption.
Memory Traffic
2. Write Back (Write Behind)
What is Write Back?
In Write Back, the CPU writes only to the cache.
Main memory is not updated immediately.
Instead, the updated cache block is marked as Dirty.
Main memory is updated only when that block is removed (evicted) from the cache.
Basic Idea
Dirty Bit
Write Back introduces a Dirty Bit.
Each cache block has one additional bit.
Dirty = 0
Block is identical to main memory.
No update required.
Dirty = 1
Block has been modified.
Must be written back before eviction.
Working Principle
When CPU writes:
Step 1
CPU updates Cache.
Step 2
Dirty Bit becomes:
1
Step 3
Main Memory is unchanged.
Step 4
When the cache block is replaced,
the modified block is copied back to Main Memory.
Sequence Diagram
During Eviction
Advantages of Write Back
- Much lower memory traffic.
- Faster write operations.
- Better cache performance.
- Reduced memory bandwidth usage.
- Lower power consumption.
Disadvantages of Write Back
- Hardware implementation is more complex.
- Requires Dirty Bit management.
- Cache and RAM may temporarily contain different values.
- Modified data may be lost if power fails before write-back (unless protected by battery-backed cache, ECC, or journaling techniques).
Write Through vs Write Back
Memory Traffic Comparison
Real-World Analogy
Imagine editing a document.
Write Through
Every time you type a letter,
the document is immediately saved to disk.
Safe, but slower.
Write Back
You keep editing in memory.
The document is saved only when you click Save or close the file.
Much faster,
but unsaved changes can be lost if the computer crashes.
Where Are These Policies Used?
Write Through
Commonly used in:
- Embedded systems
- Shared-memory systems
- I/O buffers
- Systems requiring high data consistency
Write Back
Used in:
- Modern desktop CPUs
- Server processors
- Mobile processors
- High-performance computing systems
Nearly all modern processors use Write Back for their L1 and L2 caches because of its superior performance.
Dirty Bit Explained
Each cache block contains a Dirty Bit.
| Dirty Bit | Meaning |
|---|---|
| 0 | Cache block matches main memory |
| 1 | Cache block has been modified and must be written back before eviction |
The Dirty Bit is one of the key mechanisms that makes Write Back efficient.
Advantages of Good Write Policies
- Reduce average memory access time.
- Improve processor performance.
- Lower memory bandwidth consumption.
- Balance consistency and speed.
- Optimize cache utilization.
Limitations
- Write Through generates high memory traffic.
- Write Back requires additional hardware complexity.
- Dirty Bit tracking increases cache controller logic.
- Write Back needs careful handling during power failures and system crashes.
Key Points to Remember
- Cache write policies determine how modified data is synchronized between cache and main memory.
- Write Through updates both cache and RAM immediately.
- Write Back updates only the cache initially and writes to RAM when the block is evicted.
- Write Through keeps cache and memory always consistent but increases memory traffic.
- Write Back reduces memory traffic and improves performance by delaying writes.
- A Dirty Bit is used only in Write Back to track modified cache blocks.
- Modern processors commonly use Write Back because it offers better performance for general-purpose workloads.
Conclusion
Cache write policies are a critical part of modern memory systems because they determine how modified data is managed between the cache and main memory. Write Through offers simplicity and strong consistency by updating both cache and memory simultaneously, making it suitable for systems where data integrity is the highest priority. Write Back, on the other hand, delays memory updates until cache eviction, significantly reducing memory traffic and improving write performance, which is why it is widely used in modern CPUs. Understanding these policies is essential for students preparing for Computer Architecture, Operating Systems, GATE, ESE, and VLSI/ASIC interviews, as they form the foundation of efficient cache design and memory management.
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