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ANALOG DESIGN BLOG 4 — OP-AMP & OTA ARCHITECTURES

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Analog Design Series — Blog 4 of 7

Op-Amp & OTA Architectures

Two-stage, folded-cascode, gain-boosted, and class-AB — designing the heart of analog systems

1. Op-Amp vs OTA

FeatureOp-AmpOTA
OutputLow-impedance (voltage source)High-impedance (current source)
Can driveResistive loadsCapacitive loads only
Typical useDiscrete, PCB-levelOn-chip (IC) analog
Output stageClass-A/AB bufferNone (just gain stage)
CompensationOften internally compensatedLoad capacitance often suffices

In modern IC design, the term "op-amp" is used loosely. Most on-chip implementations are technically OTAs unless they include a dedicated low-impedance output buffer.

2. The Five-Transistor OTA

The simplest complete OTA — a differential pair (M1, M2) with an active current-mirror load (M3, M4) and a tail source (M5).

VDD──────────VDD │ │ [M3]────────[M4] ← PMOS mirror (load) │ │ ├────────────├── V_out │ │ V_in- [M1]────────[M2] V_in+ └──────┬──────┘ [M5] ← Tail current I_SS │ GND
Av = gm1(ro2 ∥ ro4) ≈ gmro/2
GBW = gm1 / (2π · CL) | Slew Rate = ISS / CL
📘 Single-Stage Advantage

A single-stage OTA is inherently stable (single dominant pole at the output). No compensation capacitor needed. However, gain is limited to gmro/2 ≈ 30–50 dB, which may not be enough for precision applications.

3. Two-Stage Op-Amp (Miller OTA)

The classic two-stage architecture cascades a differential gain stage with a common-source inverting stage, connected by Miller compensation.

// Stage 1: Diff pair + mirror load (gain = g_m1 × R_out1) // Stage 2: CS amplifier (gain = −g_m6 × R_out2) // C_c: Miller compensation cap between output and stage-1 output V_in ──[Stage 1]──┬──[C_c]──┬──[Stage 2]── V_out │ │ node_1 node_2

Key Equations

Av,total = Av1 × Av2 = [gm1(ro2∥ro4)] × [gm6(ro6∥ro7)]
GBW = gm1 / (2π · Cc) | ωp2 = gm6 / CL

Stability Condition

For 60° phase margin: gm6 ≥ 2.2 × gm1 × (CL/Cc) → Typically gm6 ≈ 10 × gm1
⚠️ Right-Half-Plane Zero

The Miller cap Cc creates a feedforward path that produces a RHP zero at ωz = gm6/Cc. This degrades phase margin. Fix: add a nulling resistor Rz in series with Cc, or use a cascode compensation scheme that eliminates the feedforward.

💡 Nulling Resistor Value

Set Rz = 1/gm6 to move the RHP zero to infinity. Set Rz slightly larger than 1/gm6 to push the zero into the LHP and cancel the second pole, achieving even better phase margin.

4. Telescopic Cascode OTA

Stacks cascode transistors in a single branch to achieve very high gain in one stage, avoiding the compensation complexity of two stages.

Av ≈ gm1 × [(gmro)·ro]NMOS ∥ [(gmro)·ro]PMOS ≈ (gmro)²/2
AdvantageDisadvantage
Highest speed (single pole)Very limited output swing
Lowest noise (fewest transistors)Narrow input CM range
Lowest powerCannot drive resistive loads
No compensation cap neededGain still may be insufficient
Output swing = VDD − 4VOV − 2Vth (regular) or VDD − 4VOV (wide-swing)

5. Folded-Cascode OTA

The folded-cascode "folds" the signal current from the input pair (e.g., PMOS) into a separate cascode branch (NMOS), providing wider input CM range and better output swing.

VDD─────VDD─────VDD │ │ │ [M3] [M5] [M6] ← PMOS: M3=tail, M5-M6=current sources │ │ │ ┌─┴─┐ │ │ V+──[M1] [M2]──V- │ ← PMOS diff pair │ │ │ │ │ └─────┤ │ │ │ │ │ [M7] [M8] ← NMOS cascode │ │ │ │ [M9] [M10] ← NMOS mirror │ │ │──── V_out GND GND GND
📘 Folded vs Telescopic

Folded: Input pair and cascode use different current branches. Costs more current (Itail + Ifold), adds noise from folding transistors, but allows rail-to-ground input CM range and better output swing. Telescopic wins on speed, power, and noise when swing constraints are acceptable.

Av = gm1 × [Rout,N ∥ Rout,P] where each Rout ≈ gmro²

6. Gain-Boosted Cascode (Regulated Cascode)

A feedback amplifier (Aboost) around the cascode transistor forces VDS of the lower transistor to be constant, multiplying the output resistance.

Rout = (1 + Aboost) × gmro × ro

If Aboost = gmro (another cascode-level amplifier), total Rout becomes:

Rout ≈ (gmro)³ × ro → Av ≈ (gmro)³

This gives 100+ dB gain in a single stage — enough for pipeline ADCs and precision data converters.

⚠️ Stability of the Boost Loop

The gain-boosting amplifier creates an inner feedback loop that must be stable independently. Its GBW must be significantly higher than the main amplifier's to avoid introducing extra poles into the overall transfer function.

7. Class-AB Output Stage

When the op-amp must drive resistive loads or large off-chip capacitors, a low-impedance output stage is required.

Class-A vs Class-AB

ParameterClass-AClass-AB
Quiescent currentIQ = Iload,maxIQ ≪ Iload,max
Max output currentIQ≫ IQ
EfficiencyLow (25% max)High (up to 78.5%)
Crossover distortionNonePossible (needs careful biasing)
Power consumptionHighSignal-dependent (low at idle)

A CMOS class-AB output uses complementary NMOS/PMOS source followers with a floating current source or translinear bias circuit maintaining a constant quiescent current regardless of output level.

💡 Common Interview Question

"Why use class-AB instead of class-A?" Answer: Class-A wastes power (quiescent current must equal peak load current). Class-AB delivers large transient currents while idling at a fraction of the peak, dramatically improving power efficiency and slew rate without the quiescent penalty.

8. Fully Differential Amplifiers & CMFB

Modern IC design favors fully differential topologies for better noise rejection, doubled output swing, and even-harmonic cancellation.

Why CMFB Is Necessary

A fully differential amplifier has no defined output common-mode level — both outputs float. A Common-Mode Feedback (CMFB) circuit senses the average output voltage and adjusts a bias current to lock it at the desired level (typically VDD/2).

// CMFB Loop: // 1. Sense V_CM = (V_out+ + V_out-) / 2 // 2. Compare with V_CM,ref // 3. Adjust tail/load current to correct V_out+ ──┬──[R]──┬── V_CM_sense V_out- ──┘ │ └──[CMFB Amp]── controls bias of output stage
🔴 Critical Design Consideration

The CMFB loop must be faster than the main loop to avoid instability. In switched-capacitor CMFB (SC-CMFB), the sensing happens every clock phase and is preferred for high-speed applications. Continuous-time CMFB uses resistor averaging but loads the output.

9. Architecture Selection Guide

ArchitectureGainSpeedSwingPowerBest For
5-T OTA30–50 dBHighGoodLowestLow-precision, fast
Two-Stage Miller60–80 dBModerateFullModerateGeneral purpose
Telescopic Cascode60–80 dBHighestPoorLowPipeline ADCs
Folded Cascode60–80 dBHighModerateHigherWideband, flexible
Gain-Boosted90–120 dBHighModerateHigherPrecision ADCs, ΔΣ
Three-Stage90+ dBComplexFullHighVery low supply, niche

10. Numerical Design Example

Two-Stage Miller OTA Design

Specs: GBW = 50 MHz, CL = 2 pF, Phase Margin ≥ 60°, Gain ≥ 70 dB, VDD = 1.8V

// Step 1: Choose Cc (Cc ≈ 0.2-0.5 × CL for good margin) C_c = 0.5 × 2p = 1 pF // Step 2: First stage gm from GBW g_m1 = 2π × GBW × C_c = 2π × 50M × 1p = 314 μA/V // Round up to 400 μA/V for margin // Step 3: Second stage gm for non-dominant pole // p2 ≥ 2.2 × GBW for 60° PM // p2 = gm6/CL → gm6 ≥ 2.2 × 2π × 50M × 2p g_m6 ≥ 2.2 × 314μ × (2p/1p) = 1.38 mA/V // Use gm6 = 2 mA/V // Step 4: Sizing — if V_OV1 = 200mV I_D1 = g_m1 × V_OV1 / 2 = 400μ × 0.2 / 2 = 40 μA per side I_tail = 2 × 40μ = 80 μA // Step 5: Nulling resistor R_z = 1/g_m6 = 1/2m = 500 Ω // Step 6: Verify gain // Assume VA = 10V for all transistors r_o = 10/40μ = 250kΩ (stage 1 devices) A_v1 = g_m1 × (r_o ∥ r_o) = 400μ × 125k = 50 V/V I_D6 = g_m6 × V_OV6/2 = 2m × 0.2/2 = 200 μA r_o6 = 10/200μ = 50kΩ A_v2 = g_m6 × (r_o6 ∥ r_o7) = 2m × 25k = 50 V/V A_v_total = 50 × 50 = 2500 V/V = 68 dB // Slightly below 70 dB — increase L for higher VA or reduce V_OV Slew Rate = I_tail / C_c = 80μ / 1p = 80 V/μs

🔁 Blog 4 Recap

  • The 5-T OTA is simplest — single pole, inherently stable, but limited gain.
  • Two-stage Miller OTA uses Cc for compensation; beware the RHP zero (use nulling Rz).
  • Telescopic cascode gives the best speed/noise/power but sacrifices output swing.
  • Folded cascode trades power for wider input CM range and better swing.
  • Gain boosting multiplies Rout by the boost amplifier's gain — enables 100+ dB single-stage.
  • Fully differential designs require CMFB to define the output common-mode level.

📚 Next up — Blog 5: Feedback, Stability & Frequency Compensation — Bode plots, phase margin, pole splitting, and compensation techniques.

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